FPGA Development Integrated Environment Active-HDL
Equipped with features suitable for FPGA design and verification.
Active-HDL is an integrated solution for FPGA design creation and simulation in a team environment that operates on Windows. The Active-HDL integrated design environment (IDE) includes complete HDL and graphical design tools, as well as a mixed-language simulator for RTL/gate-level, enabling the development and verification of FPGA designs in a short period of time. *For more details, please download the PDF (English version) or feel free to contact us.*
- 企業：アルデック・ジャパン
- 価格：Other
